The development of solid state imaging devices has resulted in image sensors having high performance, high reliability, and ease of use with low power requirements. Self-scanning image sensors, such as, for example, charge coupled devices (CCD), utilize two separate video output channels, one channel representing odd picture elements (pixels) and the other channel representing even pixels. Charged coupled devices are a widely used architecture for solid state imaging devices. These devices store charge in a potential well and transfer the charge from one electrode area to an adjacent electrode area by application of voltages with appropriate time and phase relationships. A two channel output structure is utilized for high speed sensors in order to reduce the maximum output frequencies required by a single channel.
At high scanning rates, for example, 20M pixel per second, the video signal produced by a CCD sensor resembles a carrier frequency equal to the reset clock frequency of the sensor which is amplitude modulated by the pixel signal levels. For each channel output, one cycle of the carrier represents a pixel. When the two channels, which are 180.degree. out of phase, are directly combined by summing or multiplexing, each cycle of the carrier represents two pixels. The output of the CCD sensor also contains clock noise at each output at the pixel output frequency which is much greater in amplitude than the pixel intensity signal itself. Therefore, at high clock frequencies there will be little, if any, plateau representing the pixel intensity, but instead, an output waveform results that resembles an amplitude modulated carrier frequency. Generally, the large amplitude of the clock signals presents problems in amplifying the sensor array outputs to produce useful modulation signal levels. The large clock swings will cause clipping or saturation of a video amplifier, thus distorting, if not removing the video signal.
At low frequency clock rates the array output signal will include a plateau interval in the waveform that represents the modulation or signal level for a pixel. This level can be captured using a sample and hold circuit producing a stair step type output signal that eliminates the clock modulation. However, for clocking rates in excess of 10 MHz, the plateau interval becomes very short or actually disappears. Sampling the video level becomes more difficult and the sampling is very sensitive to timing variations. The need has thus arisen for a video processing system which serves to recover the video signals from image sensors operating at their maximum clock frequency which produces a video output signal that is free of clock noise.